1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly, to a method of fabricating a silicon germanium (SiGe) Bi-CMOS device having a CMOS transistor and a SiGe heterojunction bipolar transistor (HBT) using an epitaxial layer containing germanium (Ge) as a base.
2. Discussion of Related Art
SiGe Bi-CMOS technology has been recognized as the most suitable technology for fabricating a System on Chip (SoC) of radio frequency (RF)/analogue/digital among various wireless mobile communication components. In a modern wireless mobile communication field having a mainstream of miniaturization and multifunction, the SiGe Bi-CMOS technology is widely used in fabricating a System on Chip (SoC) for information communication equipment such as a cellular phone, owing to the fact that a SiGe HBT suitable to an RF/analogue circuit and a CMOS device suitable to a digital circuit can be integrated on one chip.
The SiGe HBT has advantages in that a silicon germanium (SiGe) alloy material containing about 20% germanium (Ge) mixed with silicon (Si) can be used, instead of silicon (Si), as a base, thereby obtaining a large current gain in comparison to a conventional device, and the base can be thinned, thereby making it possible to enable a high speed and radio frequency operation and achieving low power of the CMOS device.
In recent years, nano scale CMOS fabrication technology is being developed to realize an ultra-low power device. However, in the case where a device has a linewidth less than 100 nm and is fabricated using a conventional method, the resistance abruptly increases, thereby making it difficult to realize a nano-scale ultra-high speed and ultra-low power device.